Differences between revisions 70 and 71
Revision 70 as of 2011-02-06 04:03:32
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Revision 71 as of 2012-01-03 23:02:37
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||<|3> plans and overviews|| ''' CDS home page ''' || [:Upgrade_09/CDS] ||
|| ''' CDS plan for August ''' || [:Upgrade_09/CDS/August_CDS_test] ||
|| ''' Simulated Plant''' ||[:Simulated_Plant] ||
||<|2> Lists || ''' Current Hardware Lists ''' || [:Upgrade_09/CDS/current_hardware] ||
|| ''' Channel Assignments for C1SUS ''' || [:Upgrade_09/CDS/Suspension_wiring_to_channels] ||
||<|3> Technical Notes || ''' Notes about CDS realtime code ''' || [:Notes_on_getting_the_CDS_Realtime_Code_Generator_working] ||
|| ''' Notes for Green Locking interface to realtime code ''' || [:Notes_for_Green_locking_interface_to_RCG] ||
|| ''' Notes for Simulated Plant ''' ||[:Notes_for_the_RCG_40m_simulated_plant] ||
||<|3> plans and overviews|| ''' CDS home page ''' || [[Upgrade_09/CDS]] ||
|| ''' CDS plan for August ''' || [[Upgrade_09/CDS/August_CDS_test]] ||
|| ''' Simulated Plant''' ||[[Simulated_Plant]] ||
||<|2> Lists || ''' Current Hardware Lists ''' || [[Upgrade_09/CDS/current_hardware]] ||
|| ''' Channel Assignments for C1SUS ''' || [[Upgrade_09/CDS/Suspension_wiring_to_channels]] ||
||<|3> Technical Notes || ''' Notes about CDS realtime code ''' || [[Notes_on_getting_the_CDS_Realtime_Code_Generator_working]] ||
|| ''' Notes for Green Locking interface to realtime code ''' || [[Notes_for_Green_locking_interface_to_RCG]] ||
|| ''' Notes for Simulated Plant ''' ||[[Notes_for_the_RCG_40m_simulated_plant]] ||
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 || attachment:green.png '''complete'''|| attachment:orange.png '''intermediate state ''' || attachment:red.png '''incomplete''' || attachment:black.png gave up||  || {{attachment:green.png}} '''complete'''|| {{attachment:orange.png}} '''intermediate state ''' || {{attachment:red.png}} '''incomplete''' || {{attachment:black.png}} gave up||
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     . attachment:orange.png design an adapter box for the breakout boards
     . attachment:red.png make the box and install it
     . {{attachment:orange.png}} design an adapter box for the breakout boards
     . {{attachment:red.png}} make the box and install it
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     . attachment:orange.png rearrange the channel assignments
     . attachment:orange.png test all the BO channels and their assignments
     . attachment:green.png Switching over cabling from the current XY220's to the new system
     . {{attachment:orange.png}} rearrange the channel assignments
     . {{attachment:orange.png}} test all the BO channels and their assignments
     . {{attachment:green.png}} Switching over cabling from the current XY220's to the new system
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     . attachment:green.png damping all the vertex suspensions with the new CDS
     . attachment:green.png check if the binary outputs are working
     . attachment:orange.png make the daq daemon work
     . {{attachment:green.png}} damping all the vertex suspensions with the new CDS
     . {{attachment:green.png}} check if the binary outputs are working
     . {{attachment:orange.png}} make the daq daemon work
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     . attachment:green.png renewal of realtime control model
     . attachment:orange.png renewal of medm screens for the vertex suspensions
     . attachment:orange.png separate optics into some realtime models instead of one model in order to avoid run time issues
     . {{attachment:green.png}} renewal of realtime control model
     . {{attachment:orange.png}} renewal of medm screens for the vertex suspensions
     . {{attachment:orange.png}} separate optics into some realtime models instead of one model in order to avoid run time issues
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     . attachment:green.png fix {{{ feCodeGen.pl }}} script
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     . {{attachment:green.png}} fix {{{ feCodeGen.pl }}} script
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     . attachment:green.png make a new IPC parser
     . attachment:green.png string the RFM optical fiber connecting C1SUS and C1ISCEX
     . attachment:green.png switching the RFM old network to that of the new one by using the RFM bypath
     . attachment:green.png install PCI-5565 driver if it's necessary
     . attachment:orange.png test the RFM card by running the diagnostic script
     . attachment:orange.png test the RFM with the epics
     . {{attachment:green.png}} make a new IPC parser
     . {{attachment:green.png}} string the RFM optical fiber connecting C1SUS and C1ISCEX
     . {{attachment:green.png}} switching the RFM old network to that of the new one by using the RFM bypath
     . {{attachment:green.png}} install PCI-5565 driver if it's necessary
     . {{attachment:orange.png}} test the RFM card by running the diagnostic script
     . {{attachment:orange.png}} test the RFM with the epics
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     . attachment:red.png Check we have correct number of cables
     . attachment:green.png Check if both end stations are correctly running
     . {{attachment:red.png}} Check we have correct number of cables
     . {{attachment:green.png}} Check if both end stations are correctly running
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     . attachment:green.png Move the computer into 1X2 rack
     . attachment:green.png remove Marconi(?) and put a new IO chassis on 1X2 rack
     . attachment:green.png check timing/ADC/DAC on the IO chassis. And make it works (5 days)
     . {{attachment:green.png}} Move the computer into 1X2 rack
     . {{attachment:green.png}} remove Marconi(?) and put a new IO chassis on 1X2 rack
     . {{attachment:green.png}} check timing/ADC/DAC on the IO chassis. And make it works (5 days)
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     . attachment:green.png Check on fiber with Rolf for LSC
     . attachment:green.png timing/ADC/DAC check
     . {{attachment:green.png}} Check on fiber with Rolf for LSC
     . {{attachment:green.png}} timing/ADC/DAC check
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     . attachment:green.png conceptual design
     . attachment:green.png make realtime simlink model
     . attachment:orange.png compile and install the model
     . {{attachment:green.png}} conceptual design
     . {{attachment:green.png}} make realtime simlink model
     . {{attachment:orange.png}} compile and install the model
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     . attachment:green.png conceptual design
     . attachment:green.png make realtime simlink model
     . attachment:orange.png compile and install the model
     . {{attachment:green.png}} conceptual design
     . {{attachment:green.png}} make realtime simlink model
     . {{attachment:orange.png}} compile and install the model
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     . attachment:red.png renew the model with the new CDS parts
     . attachment:red.png compile and install the model
     . {{attachment:red.png}} renew the model with the new CDS parts
     . {{attachment:red.png}} compile and install the model
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     . attachment:green.png rebuild the frame builder by Gentoo OS
     . attachment:orange.png get dataviewer working
     . attachment:green.png install a heavy duty DAQ router
     . {{attachment:green.png}} rebuild the frame builder by Gentoo OS
     . {{attachment:orange.png}} get dataviewer working
     . {{attachment:green.png}} install a heavy duty DAQ router
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     . attachment:orange.png diskless boot seetings on the frame builder
     . attachment:orange.png run the front end machines with Gentoo realtime core
     . attachment:green.png run a realtime code on a new realtime Gentoo
     . {{attachment:orange.png}} diskless boot seetings on the frame builder
     . {{attachment:orange.png}} run the front end machines with Gentoo realtime core
     . {{attachment:green.png}} run a realtime code on a new realtime Gentoo
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attachment:1X1_1X2_racks.png {{attachment:1X1_1X2_racks.png}}
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New rack setup in pdf form attachment:1X1_1X2_racks.pdf New rack setup in pdf form [[attachment:1X1_1X2_racks.pdf]]
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 . {i} [[Upgrade_09/CDS/current_hardware|Current Hardwares Lists]]  . {i} [[Upgrade_09/CDS/current_hardware| Current Hardwares Lists]]
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 || <<ImageLink(BO_final.png, void, height=260)>> || <<ImageLink(BO_test.png, void, height=260)>> ||  || [[void|{{attachment:BO_final.png||height=260}}]] || [[void|{{attachment:BO_test.png||height=260}}]] ||
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 . A datasheet for the BO card is here attachment:contec32BO.pdf  . A datasheet for the BO card is here [[attachment:contec32BO.pdf]]
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 . <<ImageLink(green_sm.png, void, height=340)>>  . [[void|{{attachment:green_sm.png||height=340}}]]
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 . <<ImageLink(green_simlated_plant.png, void, height=340)>>  . [[void|{{attachment:green_simlated_plant.png||height=340}}]]
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September CDS plan

Major Missions

  • {*} Complete damping of the vertex suspensions

  • {*} Preparation for Green locking

  • {*} Simulated plants


category

description

Links

plans and overviews

CDS home page

Upgrade_09/CDS

CDS plan for August

Upgrade_09/CDS/August_CDS_test

Simulated Plant

Simulated_Plant

Lists

Current Hardware Lists

Upgrade_09/CDS/current_hardware

Channel Assignments for C1SUS

Upgrade_09/CDS/Suspension_wiring_to_channels

Technical Notes

Notes about CDS realtime code

Notes_on_getting_the_CDS_Realtime_Code_Generator_working

Notes for Green Locking interface to realtime code

Notes_for_Green_locking_interface_to_RCG

Notes for Simulated Plant

Notes_for_the_RCG_40m_simulated_plant



PLANS

TO DO LIST

  • green.png complete

    orange.png intermediate state

    red.png incomplete

    black.png gave up


  • A. Complete suspension damping keeping in mind Version B coils. (1-2 days?)

    • ADC break out boards

      • orange.png design an adapter box for the breakout boards

      • red.png make the box and install it

    • Binary Output working on c1sus (Alex/Joe) 1-2 days

      • orange.png rearrange the channel assignments

      • orange.png test all the BO channels and their assignments

      • green.png Switching over cabling from the current XY220's to the new system

    • damping test with the BOs

      • green.png damping all the vertex suspensions with the new CDS

      • green.png check if the binary outputs are working

      • orange.png make the daq daemon work

    • refinement of the control model

      • green.png renewal of realtime control model

      • orange.png renewal of medm screens for the vertex suspensions

      • orange.png separate optics into some realtime models instead of one model in order to avoid run time issues

    • misc.

      • green.png fix  feCodeGen.pl  script


  • B. Preparation for Green Locking

    • Get RFM working (3-4 days)

      • green.png make a new IPC parser

      • green.png string the RFM optical fiber connecting C1SUS and C1ISCEX

      • green.png switching the RFM old network to that of the new one by using the RFM bypath

      • green.png install PCI-5565 driver if it's necessary

      • orange.png test the RFM card by running the diagnostic script

      • orange.png test the RFM with the epics

    • Get both end stations working

      • red.png Check we have correct number of cables

      • green.png Check if both end stations are correctly running

    • Get IOO front end machine working

      • green.png Move the computer into 1X2 rack

      • green.png remove Marconi(?) and put a new IO chassis on 1X2 rack

      • green.png check timing/ADC/DAC on the IO chassis. And make it works (5 days)

    • Fix non-working IO chassis

      • green.png Check on fiber with Rolf for LSC

      • green.png timing/ADC/DAC check


  • C. Simulated Plant

    • Simulated Green Locking

      • green.png conceptual design

      • green.png make realtime simlink model

      • orange.png compile and install the model

    • LSC simulated plant

      • green.png conceptual design

      • green.png make realtime simlink model

      • orange.png compile and install the model

    • SUS simulated plant

      • red.png renew the model with the new CDS parts

      • red.png compile and install the model


  • D. Frame builder

    • rebuild frame builder

      • green.png rebuild the frame builder by Gentoo OS

      • orange.png get dataviewer working

      • green.png install a heavy duty DAQ router

    • diskless boot

      • orange.png diskless boot seetings on the frame builder

      • orange.png run the front end machines with Gentoo realtime core

      • green.png run a realtime code on a new realtime Gentoo



PSL Racks Setup

1X1_1X2_racks.png

New rack setup in pdf form 1X1_1X2_racks.pdf

WISH LIST

(not urgent things, but somethings we want to implement at some points)

  • channel wiki

  • wiki hyperlink on a medm screen



TIME LINE SCHEDULE

  • Put time line schedule here.




DETAILED CONSIDERATIONs

Cable Requirements



Notes about Binary Outputs

  • To obtain a voltage signal, a pull-up resister and a DC voltage are needed at the receiver stage because the signal is generated with a transistor.
  • An easy way to check this BO system is putting an LED on the receiver stage as described in the figure below. In this case if the signal is ON the LED lights up and vice versa.


    normal operation

    test configuration

    void

    void

  • A datasheet for the BO card is here contec32BO.pdf



Reflective Memory Network

  • What is the temporary configuration ?
  • What is the final configuration ?



Simulated Plant for Green locking

Conceptual Design

  • void

  • void

Model construction



Gain Mismatch



CDS/September_CDS_plan (last edited 2012-01-03 23:02:37 by localhost)