== Rough Sketch of a Schedule == === DC Readout Phase A === '''Mid Oct06 - Valentines Day 07''' * Lock OMC Length loop * Lock OMC Alignment loops * Characterize in-vac DC PDs * DC v. RF Displacement sensitivity with a Simple Michelson * DC v. RF Displacement sensitivity with PR - FPMI * Commission SUS Dewhitening filters on ITMs and ETMs === Power-Recycled Fabry-Perot Michelson - Locking === '''Nov 1 - Jan 15th''' * SMOOTH Locking (e.g. variable Finesse, guided lock, etc, etc.) * Characterize noise (roughly) * DC v. RF noise couplings AM, FM, PM, etc. === DRSE Lock Acquisition === '''Mid Oct - Jan 1st''' * Re-establish pre-vent lock acquisition * Common Mode Servo (new) * Reduce and remove CARM offset * Re-measure optical spring * Full LSC characterization === DC Readout Phase B === '''March 1, 2007 - April 1, 2007''' * DC Readout with DRSE * New hardware ? ---- == New LSC / ASC Modulation/Locking Schemes == '''Install by June 1, 2007''' * Develop and select a feasible AdvLIGO LSC/ASC scheme * Adapt to the 40m * Write a document on it * Install June 1st ---- Back to the [[Long_Term_Plans_@_the_40m]]