Differences between revisions 2 and 35 (spanning 33 versions)
Revision 2 as of 2010-03-24 23:56:07
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Revision 35 as of 2010-08-18 19:10:53
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||<tablewidth="931px" tableheight="434px" tablealign="">Name||dcuid||gds_node_id||Sampling Rate||<^>Shmem_daq||<^>No_oversampling||Machine||Notes||
||OMC||30||4||32k||<^>default||<^>default||c1omc||Output mode cleaner control||
||ASS||22||default||2k||<^>default||<^>default||c1ass||Alignment Sensing & Stabilization - Adaptive Wiener filtering||
||TST|| || || ||<^> ||<^> ||megatron || ||
||MDP|| || || ||<^> ||<^> ||megatron|| ||
||MDP|| || || ||<^> ||<^> ||megatron|| ||
||TMC|| || || ||<^> ||<^> || || ||
||TMT|| || || ||<^> ||<^> || || ||
Notes:
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/!\ For the moment, valid dcu_ids are 9-12, 17-26 (possibly higher - given OMC is already 30 it seems certain). Do not use 13-16 as these seem to be reserved in the current frame builder source code, although in the future this will not be the case.
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The new paradigm for ADC, DAC, BIO control is to have a IOP (IO Processor) running on CPU 1. (CPU 0 is used by the Linux kernel). The specific_cpu entry must be set to something other than the default and other than 0 or 1. adcSlave must also be set to 1 for it to work. pciRfm for the moment (which is Dolphin PCIE communication related) should be set to -1 unless the appropriate drivers have been installed.
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/!| This is correct as of March 26th, 2010. /!\ By using a top_names flag (added by using Block Properties in Simulink) on a top level block, you can replace the model's 3 letter name with the block's 3 letter name. Thus suspension channel located in model scy.mdl could be made to be C1:SUS-XXXX for example.

/!\ For new IOP scheme, you should *not* use the no_oversampling flag. This causes problems for the code since it in fact needs to over sample.

||'''Model Name ''' ||'''dcuid ''' ||'''gds_node_id ''' ||'''specific_cpu ''' ||'''Sampling Rate ''' ||'''Shmem_daq ''' ||'''No_oversampling ''' ||'''adcMaster or adcSlave '''||'''pciRfm ''' ||'''Machine ''' ||'''Notes ''' ||
||'''OMC''' ||30 ||4 ||default ||32k ||default ||default || ?|| ?||c1omc ||Output mode cleaner control ||
||'''ASS''' ||22 ||default ||default ||2k ||default ||default || ? || ? ||c1ass ||Alignment Sensing & Stabilization - Adaptive Wiener filtering ||
||'''c1x00'''||9 ||1 ||1 ||64k ||1 ||Not set || adcMaster=1 || -1||c1iscex || IO processor, necessary for the new computing scheme ||
||'''x01'''||10 ||2 ||1 ||64k ||1 ||Not set||adcMaster=1 || -1 ||c1iscex || Don't use, need to remake ||
||'''x02'''||11||3||1||64k||1||Not set||adcMaster=1||pciRfm=-1|| c1sus || IO processor for c1sus machine ||
||'''LSC '''||10 ||2 ||3 ||16k ||1 ||0 ||megatron ||LSC (controls) ||
||'''LSP'''||11 ||11 ||5 ||16k ||1 ||0 ||megatron ||LSP (combines positions of optics to generate LSC photodiode signals) ||
||'''SUS'''||17||<^>4||<^>7||<^>16k||<^>1||0||<^>megatron||<^>Suspension controller (vertex - BS, ITMs, PRM, SRC)||
||'''SUP'''||18||<^>5||<^>9||<^>16k||<^>1||0||<^>megatron||<^>Suspensions plant (vertex - BS, ITMs, PRM, SRC)||
||'''SCX'''||19||<^>6||<^>2||<^>16k||<^>1||0||<^>megatron||<^>Suspension Controller ETMX||
||'''SPX'''||20||<^>7||<^>4||<^>16k||<^>1||0||<^>megatron||<^>Suspension Plant ETMX||
||'''SCY'''||21||<^>8||<^>6||<^>16k||<^>1||0||<^>megatron||<^>Suspension Controller ETMY||
||'''SPY'''||22||<^>9||<^>8||<^>16k||<^>1||0||<^>megatron||<^>Suspension Plant ETMY||
||'''VGL'''|| 10 ||2||2||<^>16k||1||Not set||c1iscex||<^>Control for Vertex Green Locking||

/!\ This is correct as of March 26th, 2010.

Notes:

/!\ For the moment, valid dcu_ids are 9-12, 17-26 (possibly higher - given OMC is already 30 it seems certain). Do not use 13-16 as these seem to be reserved in the current frame builder source code, although in the future this will not be the case.

The new paradigm for ADC, DAC, BIO control is to have a IOP (IO Processor) running on CPU 1. (CPU 0 is used by the Linux kernel). The specific_cpu entry must be set to something other than the default and other than 0 or 1. adcSlave must also be set to 1 for it to work. pciRfm for the moment (which is Dolphin PCIE communication related) should be set to -1 unless the appropriate drivers have been installed.

/!\ By using a top_names flag (added by using Block Properties in Simulink) on a top level block, you can replace the model's 3 letter name with the block's 3 letter name. Thus suspension channel located in model scy.mdl could be made to be C1:SUS-XXXX for example.

/!\ For new IOP scheme, you should *not* use the no_oversampling flag. This causes problems for the code since it in fact needs to over sample.

Model Name

dcuid

gds_node_id

specific_cpu

Sampling Rate

Shmem_daq

No_oversampling

adcMaster or adcSlave

pciRfm

Machine

Notes

OMC

30

4

default

32k

default

default

?

?

c1omc

Output mode cleaner control

ASS

22

default

default

2k

default

default

?

?

c1ass

Alignment Sensing & Stabilization - Adaptive Wiener filtering

c1x00

9

1

1

64k

1

Not set

adcMaster=1

-1

c1iscex

IO processor, necessary for the new computing scheme

x01

10

2

1

64k

1

Not set

adcMaster=1

-1

c1iscex

Don't use, need to remake

x02

11

3

1

64k

1

Not set

adcMaster=1

pciRfm=-1

c1sus

IO processor for c1sus machine

LSC

10

2

3

16k

1

0

megatron

LSC (controls)

LSP

11

11

5

16k

1

0

megatron

LSP (combines positions of optics to generate LSC photodiode signals)

SUS

17

4

7

16k

1

0

megatron

Suspension controller (vertex - BS, ITMs, PRM, SRC)

SUP

18

5

9

16k

1

0

megatron

Suspensions plant (vertex - BS, ITMs, PRM, SRC)

SCX

19

6

2

16k

1

0

megatron

Suspension Controller ETMX

SPX

20

7

4

16k

1

0

megatron

Suspension Plant ETMX

SCY

21

8

6

16k

1

0

megatron

Suspension Controller ETMY

SPY

22

9

8

16k

1

0

megatron

Suspension Plant ETMY

VGL

10

2

2

16k

1

Not set

c1iscex

Control for Vertex Green Locking

/!\ This is correct as of March 26th, 2010.

/!\ Note the file /cvs/cds/caltech/target/gds/param/testpoint.par has lines [C-node#] where # is gds_node_id -1.

CDS/Existing_RCG_DCUID_and_gds_ids (last edited 2022-06-21 23:50:48 by AnchalguptaATligoDOTorg)