Racks' Map

attachment:yarm.png

Yarm

[#1Y4 1Y4]

attachment:rack.png

[#1Y3 1Y3]

attachment:rack.png

[#1Y2 1Y2]

attachment:rack.png

[#1Y1 1Y1]

attachment:rack.png

[#1X8 1X8]

attachment:rack.png

Xarm

attachment:xarm.png

[#OMC OMC]

attachment:rack.png

[#1X1 1X1]

[#1X2 1X2]

- -

[#1X3 1X3]

[#1X4 1X4]

[#1X5 1X5]

[#1X6 1X6]

[#1X7 1X7]

- -

[#1X9 1X9]

- -

c1ioo IO

c1ioo FE

- -

[#1X3 1X3]

[#1X4 1X4]

[#1X5 1X5]

[#1X6 1X6]

[#1X7 1X7]

- -

[#1X9 1X9]

- -

Art courtesy of Kiwamu BR BR

1X1

c1ioo chassis
1. Trenton BPX6806 506806, 18 slot PCIe backplane
2. Timing board [https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=7093 D070071]
  1. Connects to IO chassis interface
3. Advanced LIGO IO chassis Interface board [https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=5250 D0902029-V3]
4. 2 ADCs PMC66-16AI6455A-64-50M attachment:ADCmanual.pdf
  1. ADC 0 is in slot 1, and connects to ADC Adapter Board in slot 1
  2. ADC 1 is in slot 2 and connects to ADC Adapter Board in slot 2
5. 2 ADL General Standards 16 bit ADC Adapter Board [https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=5190 D0902006]
6. 1 DAC PMC66-16AO16-16-F0-OF attachment:DACmanual.pdf
  1. DAC 0 is in slot 3 and connects to DAC Adapter Board in slot 3
7. 1 ADL General Standards 16 bit DAC Adapter Board [https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=6787 D0902496-v1]
8. 1 Contec DIO-1616L-PE Isolated Digital IO board attachment:BO_and_BIO_manual.pdf
  1. This is in slot 16 and connects to IO chassis Interface
9. 1 Contec DO-32L-PE Isolated Digital Output Board attachment:BO_and_BIO_manual.pdf
  1. BO0 is in slot 8

1X2

c1ioo computer. See CDS Map/c1ioo
1. Runs c1x03 IOP (input output processor). [https://nodus.ligo.caltech.edu:30889/FE/c1x03_slwebview_files/index.html webview]
2. Runs c1ioo front end model. [https://nodus.ligo.caltech.edu:30889/FE/c1ioo_slwebview_files/index.html webview]

-  ⇤ ← Revision 4 as of 2011-01-13 21:08:21 → 
  Size: 2136
  Editor: JoeBetzwieser
  Comment:
+   ← Revision 6 as of 2011-01-13 22:22:26 → ⇥
  Size: 2674
  Editor: JoeBetzwieser
  Comment:
-Deletions are marked like this.
+Additions are marked like this.
 Line 32:
-. 2 ADCs PMC66-16AI6455A-64-50M
+. Trenton BPX6806 506806, 18 slot PCIe backplane
  1. Timing board [https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=7093 D070071]
    a. Connects to IO chassis interface
  1. Advanced LIGO IO chassis Interface board [https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=5250 D0902029-V3]
  1. 2 ADCs PMC66-16AI6455A-64-50M attachment:ADCmanual.pdf
-Line 35:
+Line 40:
-. 2 Advanced LIGO ADL General Standards 16 bit ADC Adapter Board (D0902006)
  1. 1 DAC PMC66-16AO16-16-F0-OF
+. 2 ADL General Standards 16 bit ADC Adapter Board [https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=5190 D0902006]
  1. 1 DAC PMC66-16AO16-16-F0-OF attachment:DACmanual.pdf
-Line 38:
+Line 43:
-. 1 Contec DIO-1616L-PE Isolated Digital IO board
   a. This is in slot 16 and connects to IO chassis Interface
  1. 1 Contec DO-32L-PE Isolated Digital Output Board
+. 1 ADL General Standards 16 bit DAC Adapter Board [https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=6787 D0902496-v1]
  1. 1 Contec DIO-1616L-PE Isolated Digital IO board attachment:BO_and_BIO_manual.pdf
   a. This is in slot 16 and connects to IO chassis Interface 
  1. 1 Contec DO-32L-PE Isolated Digital Output Board attachment:BO_and_BIO_manual.pdf
-Line 42:
+Line 48:
-. Timing Board, DCC #: D070071 
   a. This connects to IO chassis interface
  1. Trenton BPX6806 506806, 18 slot PCIe backplane 
  1. Advanced LIGO IO Chassis Interface, DCC # D0902029-V3

All slots are listed as counting from the right, looking at the back of the chassis
 Line 51:
- A. '''c1ioo''' computer
  1. Runs '''c1x04''' IOP (input output processor)
  1. Runs '''c1ioo''' front end model
+ A. '''c1ioo''' computer.  See [[CDS Map/c1ioo]]
  1. Runs '''c1x03''' IOP (input output processor).  [https://nodus.ligo.caltech.edu:30889/FE/c1x03_slwebview_files/index.html webview]
  1. Runs '''c1ioo''' front end model.  [https://nodus.ligo.caltech.edu:30889/FE/c1ioo_slwebview_files/index.html webview]