Differences between revisions 2 and 10 (spanning 8 versions)
⇤ ← Revision 2 as of 2011-01-12 01:15:33 →
Size: 1609
Editor: JoeBetzwieser
Comment:
← Revision 10 as of 2011-01-27 22:51:18 → ⇥
Size: 8318
Editor: JoeBetzwieser
Comment:
Deletions are marked like this. Additions are marked like this.
Line 3: Line 3:
= Racks' Map = = CDS Map =
Line 5: Line 5:
|| . || ||<|16> attachment:yarm.png|| ''''' Yarm ''''' ||
|| . || || ||
||[#1Y4 1Y4] || attachment:rack.png|| ||
|| . || || ||
|| . || || ||
|| . || || ||
|| . || || ||
|| . || || ||
|| . || || ||
|| . || || ||
|| [#1Y3 1Y3] || attachment:rack.png|| ||
|| [#1Y2 1Y2]|| attachment:rack.png|| ||
|| . || || ||
|| [#1Y1 1Y1]||attachment:rack.png || ||
|| . || || || || || || || || || || || [#1X8 1X8]|| attachment:rack.png || || ''''' Xarm '''''||
|| . || ||<-30> attachment:xarm.png ||
|| [#OMC OMC] || attachment:rack.png|| || attachment:rack.png ||attachment:rack.png || ||attachment:rack.png ||attachment:rack.png ||attachment:rack.png ||attachment:rack.png ||attachment:rack.png || || || ||attachment:rack.png || ||
|| || || || [#1X1 1X1] || [#1X2 1X2] || - - || [#1X3 1X3] || [#1X4 1X4]|| [#1X5 1X5] || [#1X6 1X6]|| [#1X7 1X7]|| - - || - - || - - || [#1X9 1X9]|| - - ||		 || . || . || ||<|16> attachment:yarm.png|| ''''' Yarm ''''' ||
|| . || . || || ||
||[#c1iscexIOFE c1iscex IO/FE] || [#1Y4 1Y4] || attachment:rack.png|| ||
|| . || . || || ||
|| . || . || || ||
|| . || . || || ||
|| . || . || || ||
|| [#c1lscIOFE c1lsc IO/FE] || [#1Y3 1Y3] || attachment:rack.png|| ||
|| . || [#1Y2 1Y2]|| attachment:rack.png|| ||
|| . || . || || ||
|| . || [#1Y1 1Y1]||attachment:rack.png || ||
|| . || [#OMC OMC] || attachment:rack.png||
|| . || . || || ||
|| . || . || || || || || || || || || || [#1X8 1X8]|| attachment:rack.png || ''''' Xarm '''''||
|| . || . || ||<-30> attachment:xarm.png ||
|| . || . || ||attachment:rack.png ||attachment:rack.png || ||attachment:rack.png ||attachment:rack.png ||attachment:rack.png ||attachment:rack.png || attachment:rack.png || ||attachment:rack.png || ||
|| . || || || || [#1X1 1X1] || [#1X2 1X2] || - - || [#1X3 1X3] || [#1X4 1X4]|| [#1X5 1X5] || [#1X6 1X6]|| [#1X7 1X7]|| - - || [#1X9 1X9]|| - - ||
|| . || || || || [#c1iooIO c1ioo IO] || [#c1iooFE c1ioo FE] || - - || - - || c1sus [#c1susIO IO]/[#c1susFE FE] || - - || [#fb framebuilder] || - - || - - || [#c1iscexIOFE c1iscex IO/FE] || - - ||
Line 30: Line 30:
 A. '''c1ioo''' chassis
  1. 2 ADCs PMC66-16AI6455A-64-50M
   a. ADC 0 is in slot 1
   a. ADC 1 is in slot 3
  1. 1 DAC PMC66-16AO16-16-F0-OF
   a. DAC 0 is in slot 2
  1. 1 Contec DIO-1616L-PE Isolated Digital IO board
  1. 1 Contec DO-32L-PE Isolated Digital Output Board
   a. BO0 is in slot 4
  1. Timing Board, DCC #: D070071
  1. Trenton BPX6806 506806, 18 slot PCIe backplane

All slots are listed as counting from the right, looking at the back of the chassis		 <<Anchor(c1iooIO)>>
 A. '''c1ioo''' IO chassis
  1. Trenton BPX6806 506806, 18 slot PCIe backplane
  1. Timing board [https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=7093 D070071]
    a. Connects to IO chassis interface
  1. Advanced LIGO IO chassis Interface board [https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=5250 D0902029-V3]
  1. 2 ADCs PMC66-16AI6455A-64-50M [http://www.generalstandards.com/download.php?catid=usermanual&file=pmc16ai64_man_090406.pdf Manual]
   a. ADC 0 is in slot 1, and connects to ADC Adapter Board in slot 1
   a. ADC 1 is in slot 2 and connects to ADC Adapter Board in slot 2
  1. 2 ADL General Standards 16 bit ADC Adapter Board [https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=5190 D0902006]
  1. 1 DAC PMC66-16AO16-16-F0-OF [http://www.generalstandards.com/download.php?catid=usermanual&file=pmc66_16ao16_man_090406.pdf Manual]
   a. DAC 0 is in slot 3 and connects to DAC Adapter Board in slot 3
  1. 1 ADL General Standards 16 bit DAC Adapter Board [https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=6787 D0902496-v1]
  1. 1 Contec DIO-1616L-PE Isolated Digital IO board [http://www.contec.com/products/dlrank/dlranklog.cgi?dl=DIO-1616L-PE:LYFY76:1/1 Manual]
   a. This is in slot 16 and connects to IO chassis Interface
  1. 1 Contec DO-32L-PE Isolated Digital Output Board [http://www.contec.com/products/dlrank/dlranklog.cgi?dl=DIO-1616L-PE:LYFY76:1/1 Manual]
   a. BO0 is in slot 8
  1. One Stop Sytems Host interface board OSS-MAX-EXP-ELB-C
   a. This is in the far right slot when looking at the back of the chassis. It connects to the c1ioo FE computer.
Line 46: Line 52:
 A. '''c1ioo''' computer
  1. Runs '''c1x04''' IOP (input output processor)
  1. Runs '''c1ioo''' front end model		 <<Anchor(c1iooFE)>>
 A. '''c1ioo''' FE computer. 16 processors. See [[CDS Map/c1ioo]]
  1. GE Fanuc VMIC 5565 with PMC to PCI adapter board [http://defense.ge-ip.com/account/download/1881/1286 Manual]
    a. This connects to the Reflected memory network hub in rack [#1X7 1X7].
  1. One Stop Systems Host interface card OSS-PCIe-HIB2-x4-H [http://www.onestopsystems.com/documents/OSS-PCIe-HIB2-x4-H-T_003.pdf Manual]
    a. This connects to the [#c1iooIO c1ioo IO] chassis.
  1. Runs '''c1x03''' IOP (input output processor). [https://nodus.ligo.caltech.edu:30889/FE/c1x03_slwebview_files/index.html webview]
  1. Runs '''c1ioo''' front end model. Input Output Optics [https://nodus.ligo.caltech.edu:30889/FE/c1ioo_slwebview_files/index.html webview]


<<Anchor(1X3)>>
== 1X3 ==

<<Anchor(1X4)>>
== 1X4 ==
<<Anchor(c1susIO)>>
 A. '''c1sus''' IO chassis
  1. Trenton BPX6806 506806, 18 slot PCIe backplane
  1. Timing board [https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=7093 D070071]
    a. Connects to IO chassis interface
  1. Advanced LIGO IO chassis Interface board [https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=5250 D0902029-V3]
  1. 4 ADCs PMC66-16AI6455A-64-50M [http://www.generalstandards.com/download.php?catid=usermanual&file=pmc16ai64_man_090406.pdf Manual]
   a. ADC 0 is in slot 1, and connects to ADC Adapter Board in slot 3
   a. ADC 1 is in slot 4 and connects to ADC Adapter Board in slot 5
   a. ADC 2 is in slot 3 and connects to ADC Adapter board in slot 4
   a. ADC 3 is in slot 5 and connects to ADC Adapter board in slot 6
  1. 4 ADL General Standards 16 bit ADC Adapter Boards [https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=5190 D0902006]
   a. ADC 0 adapter board in slot 3 connects to top anti-aliasing chassis in rack [#1X5 1X5].
   a. ADC 1 adapter board in slot 5 connects to bottom Anti-aliasing chassis in rack [#1X5 1X5].
   a. ADC 2 adapter board in slot 4 connects to DB37 to ADC SCSI Adapter D080302
   a. ADC 3 adapter board in slot 6 connects to anti-aliasing chassis in rack [#1X7 1X7]
  1. 3 DACs PMC66-16AO16-16-F0-OF [http://www.generalstandards.com/download.php?catid=usermanual&file=pmc66_16ao16_man_090406.pdf Manual]
   a. DAC 0 is in slot 2 and connects to DAC Adapter Board in slot 2
   a. DAC 1 is in slot 11 and connects to DAC Adapter Board in slot 11
   a. DAC 2 is in slot 10 and connects to DAC Adapter Board in slot 10
  1. 3 ADL General Standards 16 bit DAC Adapter Boards [https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=6787 D0902496-v1]
   a. DAC 0 adapter board in slot 2 connects to top most DAC to IDC adapter D080303 in rack [#1X5 1X5]
   a. DAC 1 adapter board in slot 11 connects to middle DAC to IDC adapter D080303 in rack [#1X5 1X5]
   a. DAC 2 adapter board in slot 10 connects to bottom DAC to IDC adapter D080303 in rack [#1X5 1X5]
  1. 1 Contec DIO-1616L-PE Isolated Digital IO board [http://www.contec.com/products/dlrank/dlranklog.cgi?dl=DIO-1616L-PE:LYFY76:1/1 Manual]
   a. This is in slot 16 and connects to IO chassis Interface
  1. 4 Contec DO-32L-PE Isolated Digital Output Board [http://www.contec.com/products/dlrank/dlranklog.cgi?dl=DIO-1616L-PE:LYFY76:1/1 Manual]
   a. BO0 is in slot 9 and connects to top most Binary IO adapter in rack [#1X5 1X5]
   a. BO1 is in slot 8 and connects to 2nd from the top Binary IO adapter in rack [#1X5 1X5]
   a. BO2 is in slot 7 and connects to 3rd from the top Binary IO adapter in rack [#1X5 1X5]
   a. BO3 is in slot 6 and connects to bottom Binary IO adapter in rack [#1X5 1X5]
  1. One Stop Systems expansion link board OSS-MAX-EXP-ELB-C
   a. This is in the far right slot when looking at the back of the chassis. It connects to the [#c1susFE c1sus FE] computer.

 A. '''c1sus''' FE chassis. 6 processors. See [[CDS Map/c1sus]]
  1. GE Fanuc VMIC 5565 with PMC to PCI adapter board [http://defense.ge-ip.com/account/download/1881/1286 Manual]
    a. This connects to the Reflected memory network hub in rack [#1X7 1X7].
  1. Dolphin DXH510 PCI Express Host Adapter
    a. This connects to the Dolphin DXS410 dx 10 Port Switch in rack [#1X4 1X4]
  1. One Stop Systems host interface board OSS-PCIe-HIB2-x4-H
    a. This connects to the [#c1susIO c1sus IO] chassis.
  1. Runs '''c1x02''' IOP (input output processor). [https://nodus.ligo.caltech.edu:30889/FE/c1x02_slwebview_files/index.html webview]
  1. Runs '''c1sus''' front end model. Suspensions. [https://nodus.ligo.caltech.edu:30889/FE/c1sus_slwebview_files/index.html webview]
  1. Runs '''c1mcs''' front end model. Mode Cleaner Suspensions. [https://nodus.ligo.caltech.edu:30889/FE/c1sus_slwebview_files/index.html webview]
  1. Runs '''c1rfm''' front end model. Reflected memory. [https://nodus.ligo.caltech.edu:30889/FE/c1rfm_slwebview_files/index.html webview]
  1. Runs '''c1pem''' front end model. Physical Environment Monitor. [https://nodus.ligo.caltech.edu:30889/FE/c1pem_slwebview_files/index.html webview]

 A. Dolphin DXS410 dx 10 Port Switch
    a. Connects to c1sus FE computer in [#1X4 1X4] and via fiber to the c1lsc FE computer in rack [#1Y3 1Y3]

<<Anchor(1X5)>>
== 1X5 ==

<<Anchor(1X6)>>
== 1X6 ==

<<Anchor(1X7)>>
== 1X7 ==

<<Anchor(1X8)>>
== 1X8 ==

<<Anchor(1X9)>>
== 1X9 ==

<<Anchor(1Y1)>>
== 1Y1 ==

<<Anchor(1Y2)>>
== 1Y2 ==

<<Anchor(1Y3)>>
== 1Y3 ==

<<Anchor(1Y4)>>
== 1Y4 ==

Still under construction

CDS Map

.

.

attachment:yarm.png

Yarm

.

.

[#c1iscexIOFE c1iscex IO/FE]

[#1Y4 1Y4]

attachment:rack.png

.

.

.

.

.

.

.

.

[#c1lscIOFE c1lsc IO/FE]

[#1Y3 1Y3]

attachment:rack.png

.

[#1Y2 1Y2]

attachment:rack.png

.

.

.

[#1Y1 1Y1]

attachment:rack.png

.

[#OMC OMC]

attachment:rack.png

.

.

.

.

[#1X8 1X8]

attachment:rack.png

Xarm

.

.

attachment:xarm.png

.

.

attachment:rack.png

attachment:rack.png

attachment:rack.png

attachment:rack.png

attachment:rack.png

attachment:rack.png

attachment:rack.png

attachment:rack.png

.

[#1X1 1X1]

[#1X2 1X2]

- -

[#1X3 1X3]

[#1X4 1X4]

[#1X5 1X5]

[#1X6 1X6]

[#1X7 1X7]

- -

[#1X9 1X9]

- -

.

[#c1iooIO c1ioo IO]

[#c1iooFE c1ioo FE]

- -

- -

c1sus [#c1susIO IO]/[#c1susFE FE]

- -

[#fb framebuilder]

- -

- -

[#c1iscexIOFE c1iscex IO/FE]

- -

Art courtesy of Kiwamu BR BR

1X1

  1. c1ioo IO chassis

    1. Trenton BPX6806 506806, 18 slot PCIe backplane

    2. Timing board [https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=7093 D070071]

      1. Connects to IO chassis interface

    3. Advanced LIGO IO chassis Interface board [https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=5250 D0902029-V3]

    4. 2 ADCs PMC66-16AI6455A-64-50M [http://www.generalstandards.com/download.php?catid=usermanual&file=pmc16ai64_man_090406.pdf Manual]

      1. ADC 0 is in slot 1, and connects to ADC Adapter Board in slot 1
      2. ADC 1 is in slot 2 and connects to ADC Adapter Board in slot 2

    5. 2 ADL General Standards 16 bit ADC Adapter Board [https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=5190 D0902006]

    6. 1 DAC PMC66-16AO16-16-F0-OF [http://www.generalstandards.com/download.php?catid=usermanual&file=pmc66_16ao16_man_090406.pdf Manual]

      1. DAC 0 is in slot 3 and connects to DAC Adapter Board in slot 3

    7. 1 ADL General Standards 16 bit DAC Adapter Board [https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=6787 D0902496-v1]

    8. 1 Contec DIO-1616L-PE Isolated Digital IO board [http://www.contec.com/products/dlrank/dlranklog.cgi?dl=DIO-1616L-PE:LYFY76:1/1 Manual]

      1. This is in slot 16 and connects to IO chassis Interface

    9. 1 Contec DO-32L-PE Isolated Digital Output Board [http://www.contec.com/products/dlrank/dlranklog.cgi?dl=DIO-1616L-PE:LYFY76:1/1 Manual]

      1. BO0 is in slot 8
    10. One Stop Sytems Host interface board OSS-MAX-EXP-ELB-C
      1. This is in the far right slot when looking at the back of the chassis. It connects to the c1ioo FE computer.

1X2

  1. c1ioo FE computer. 16 processors. See CDS Map/c1ioo

    1. GE Fanuc VMIC 5565 with PMC to PCI adapter board [http://defense.ge-ip.com/account/download/1881/1286 Manual]

      1. This connects to the Reflected memory network hub in rack [#1X7 1X7].

    2. One Stop Systems Host interface card OSS-PCIe-HIB2-x4-H [http://www.onestopsystems.com/documents/OSS-PCIe-HIB2-x4-H-T_003.pdf Manual]

      1. This connects to the [#c1iooIO c1ioo IO] chassis.

    3. Runs c1x03 IOP (input output processor). [https://nodus.ligo.caltech.edu:30889/FE/c1x03_slwebview_files/index.html webview]

    4. Runs c1ioo front end model. Input Output Optics [https://nodus.ligo.caltech.edu:30889/FE/c1ioo_slwebview_files/index.html webview]

1X3

1X4

  1. c1sus IO chassis

    1. Trenton BPX6806 506806, 18 slot PCIe backplane

    2. Timing board [https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=7093 D070071]

      1. Connects to IO chassis interface

    3. Advanced LIGO IO chassis Interface board [https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=5250 D0902029-V3]

    4. 4 ADCs PMC66-16AI6455A-64-50M [http://www.generalstandards.com/download.php?catid=usermanual&file=pmc16ai64_man_090406.pdf Manual]

      1. ADC 0 is in slot 1, and connects to ADC Adapter Board in slot 3
      2. ADC 1 is in slot 4 and connects to ADC Adapter Board in slot 5
      3. ADC 2 is in slot 3 and connects to ADC Adapter board in slot 4
      4. ADC 3 is in slot 5 and connects to ADC Adapter board in slot 6

    5. 4 ADL General Standards 16 bit ADC Adapter Boards [https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=5190 D0902006]

      1. ADC 0 adapter board in slot 3 connects to top anti-aliasing chassis in rack [#1X5 1X5].
      2. ADC 1 adapter board in slot 5 connects to bottom Anti-aliasing chassis in rack [#1X5 1X5].
      3. ADC 2 adapter board in slot 4 connects to DB37 to ADC SCSI Adapter D080302
      4. ADC 3 adapter board in slot 6 connects to anti-aliasing chassis in rack [#1X7 1X7]

    6. 3 DACs PMC66-16AO16-16-F0-OF [http://www.generalstandards.com/download.php?catid=usermanual&file=pmc66_16ao16_man_090406.pdf Manual]

      1. DAC 0 is in slot 2 and connects to DAC Adapter Board in slot 2
      2. DAC 1 is in slot 11 and connects to DAC Adapter Board in slot 11
      3. DAC 2 is in slot 10 and connects to DAC Adapter Board in slot 10

    7. 3 ADL General Standards 16 bit DAC Adapter Boards [https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=6787 D0902496-v1]

      1. DAC 0 adapter board in slot 2 connects to top most DAC to IDC adapter D080303 in rack [#1X5 1X5]
      2. DAC 1 adapter board in slot 11 connects to middle DAC to IDC adapter D080303 in rack [#1X5 1X5]
      3. DAC 2 adapter board in slot 10 connects to bottom DAC to IDC adapter D080303 in rack [#1X5 1X5]

    8. 1 Contec DIO-1616L-PE Isolated Digital IO board [http://www.contec.com/products/dlrank/dlranklog.cgi?dl=DIO-1616L-PE:LYFY76:1/1 Manual]

      1. This is in slot 16 and connects to IO chassis Interface

    9. 4 Contec DO-32L-PE Isolated Digital Output Board [http://www.contec.com/products/dlrank/dlranklog.cgi?dl=DIO-1616L-PE:LYFY76:1/1 Manual]

      1. BO0 is in slot 9 and connects to top most Binary IO adapter in rack [#1X5 1X5]
      2. BO1 is in slot 8 and connects to 2nd from the top Binary IO adapter in rack [#1X5 1X5]
      3. BO2 is in slot 7 and connects to 3rd from the top Binary IO adapter in rack [#1X5 1X5]
      4. BO3 is in slot 6 and connects to bottom Binary IO adapter in rack [#1X5 1X5]
    10. One Stop Systems expansion link board OSS-MAX-EXP-ELB-C
      1. This is in the far right slot when looking at the back of the chassis. It connects to the [#c1susFE c1sus FE] computer.

  2. c1sus FE chassis. 6 processors. See CDS Map/c1sus

    1. GE Fanuc VMIC 5565 with PMC to PCI adapter board [http://defense.ge-ip.com/account/download/1881/1286 Manual]

      1. This connects to the Reflected memory network hub in rack [#1X7 1X7].
    2. Dolphin DXH510 PCI Express Host Adapter
      1. This connects to the Dolphin DXS410 dx 10 Port Switch in rack [#1X4 1X4]
    3. One Stop Systems host interface board OSS-PCIe-HIB2-x4-H
      1. This connects to the [#c1susIO c1sus IO] chassis.

    4. Runs c1x02 IOP (input output processor). [https://nodus.ligo.caltech.edu:30889/FE/c1x02_slwebview_files/index.html webview]

    5. Runs c1sus front end model. Suspensions. [https://nodus.ligo.caltech.edu:30889/FE/c1sus_slwebview_files/index.html webview]

    6. Runs c1mcs front end model. Mode Cleaner Suspensions. [https://nodus.ligo.caltech.edu:30889/FE/c1sus_slwebview_files/index.html webview]

    7. Runs c1rfm front end model. Reflected memory. [https://nodus.ligo.caltech.edu:30889/FE/c1rfm_slwebview_files/index.html webview]

    8. Runs c1pem front end model. Physical Environment Monitor. [https://nodus.ligo.caltech.edu:30889/FE/c1pem_slwebview_files/index.html webview]

  3. Dolphin DXS410 dx 10 Port Switch
    1. Connects to c1sus FE computer in [#1X4 1X4] and via fiber to the c1lsc FE computer in rack [#1Y3 1Y3]

1X5

1X6

1X7

1X8

1X9

1Y1

1Y2

1Y3

1Y4

CDS/CDS_Map (last edited 2012-01-03 23:02:38 by localhost)